Software pipelining with register allocation and spilling

Authors:
Jian Wang;Andreas Krall;M. Anton Ertl;Christine Eisenbeis
Affiliations:
Institut für Computersprachen, Technische Universität Wien, Argentinierstr. 8, A-1040 Vienna, Austria;Institut für Computersprachen, Technische Universität Wien, Argentinierstr. 8, A-1040 Vienna, Austria;Institut für Computersprachen, Technische Universität Wien, Argentinierstr. 8, A-1040 Vienna, Austria;INRIA-Rocquencourt, Domaine de Voluceau, BP 105-78153, Le Chesnay Cedex, France
Venue:
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Year:
1994

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Abstract

This paper studies the problem of simultaneous register allocation and software pipelining. We present the Register Requirement Graph to dynamically reflect the register requirement during software pipelining and develop a Register-Pressure-Sensitive (RPS) scheduling technique. Three algorithms—RPS without spilling, RPS with spilling and software pipelining with a limited number of registers—are proposed. The preliminary experimental results show the efficiency of the three algorithms.