Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
Simultaneous scheduling and allocation for cost constrained optimal architectural synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Instruction-level parallel processing: history, overview, and perspective
The Journal of Supercomputing - Special issue on instruction-level parallelism
An Optimal Instruction Scheduler for Superscalar Processor
IEEE Transactions on Parallel and Distributed Systems
Time-constrained code compaction for DSP's
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An integrated approach to retargetable code generation
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Optimal and near-optimal global register allocations using 0–1 integer programming
Software—Practice & Experience
ACM SIGPLAN Notices
Optimal instruction scheduling using integer programming
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Optimal spilling for CISC machines with few registers
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Register allocation by priority-based coloring
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
Register allocation for irregular architectures
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
PROPAN: A Retargetable System for Postpass Optimisations and Analyses
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Translating Out of Static Single Assignment Form
SAS '99 Proceedings of the 6th International Symposium on Static Analysis
Sweep as a Generic Pruning Technique Applied to the Non-overlapping Rectangles Constraint
CP '01 Proceedings of the 7th International Conference on Principles and Practice of Constraint Programming
Simple Generation of Static Single-Assignment Form
CC '00 Proceedings of the 9th International Conference on Compiler Construction
Constraints-driven scheduling and resource assignment
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Exploring the Performance Potential of Itanium® Processors with ILP-based Scheduling
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
A generalized algorithm for graph-coloring register allocation
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Optimal Superblock Scheduling Using Enumeration
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Fast liveness checking for ssa-form programs
Proceedings of the 6th annual IEEE/ACM international symposium on Code generation and optimization
Optimal vs. heuristic integrated code generation for clustered VLIW architectures
SCOPES '08 Proceedings of the 11th international workshop on Software & compilers for embedded systems
Register allocation by puzzle solving
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
An Application of Constraint Programming to Superblock Instruction Scheduling
CP '08 Proceedings of the 14th international conference on Principles and Practice of Constraint Programming
CC'07 Proceedings of the 16th international conference on Compiler construction
Register allocation for programs in SSA-Form
CC'06 Proceedings of the 15th international conference on Compiler Construction
Register allocation via coloring
Computer Languages
Extending chip in order to solve complex scheduling and placement problems
Mathematical and Computer Modelling: An International Journal
Constraint-based code generation
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
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This paper introduces a constraint model and solving techniques for code generation in a compiler back-end. It contributes a new model for global register allocation that combines several advanced aspects: multiple register banks (subsuming spilling to memory), coalescing, and packing. The model is extended to include instruction scheduling and bundling. The paper introduces a decomposition scheme exploiting the underlying program structure and exhibiting robust behavior for functions with thousands of instructions. Evaluation shows that code quality is on par with LLVM, a state-of-the-art compiler infrastructure. The paper makes important contributions to the applicability of constraint programming as well as compiler construction: essential concepts are unified in a high-level model that can be solved by readily available modern solvers. This is a significant step towards basing code generation entirely on a high-level model and by this facilitates the construction of correct, simple, flexible, robust, and high-quality code generators.