REAL: a program for REgister ALlocation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Verification of hardware descriptions by retargetable code generation
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Code generation for streaming: an access/execute mechanism
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
A global, dynamic register allocation and binding for a data path synthesis system
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Register allocation with instruction scheduling
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Load/store range analysis for global register allocation
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Retargetable self-test program generation using constraint logic programming
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Optimal register assignment to loops for embedded code generation
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Time-constrained code compaction for DSPs
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Optimal register assignment to loops for embedded code generation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An efficient model for DSP code generation: performance, code size, estimated energy
ISSS '97 Proceedings of the 10th international symposium on System synthesis
HDL-based modeling of embedded processor behavior for retargetable compilation
Proceedings of the 11th international symposium on System synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Static resource models of instruction sets
Proceedings of the 14th international symposium on Systems synthesis
Code generation for embedded processors
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Optimal integrated code generation for clustered VLIW architectures
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Embedded software in real-time signal processing systems: design technologies
Readings in hardware/software co-design
Static resource models for code-size efficient embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Instruction-Set Modeling for ASIP Code Generation
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers
Transactions on High-Performance Embedded Architectures and Compilers II
Optimal integrated VLIW code generation with integer linear programming
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
Constraint-Based register allocation and instruction scheduling
CP'12 Proceedings of the 18th international conference on Principles and Practice of Constraint Programming
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