Code generation using tree matching and dynamic programming
ACM Transactions on Programming Languages and Systems (TOPLAS)
Conflict modelling and instruction scheduling in code generation for in-house DSP cores
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Time-constrained code compaction for DSPs
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Instruction set definition and instruction selection for ASIPs
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
An integrated approach to retargetable code generation
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Graph based retargetable microcode compilation in the MIMOLA design system
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
Code Generation for Embedded Processors
Code Generation for Embedded Processors
Efficient code generation for in-house DSP-cores
EDTC '95 Proceedings of the 1995 European conference on Design and Test
A unified scheduling model for high-level synthesis and code generation
EDTC '95 Proceedings of the 1995 European conference on Design and Test
A BDD-based frontend for retargetable compilers
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Some Experiments in Local Microcode Compaction for Horizontal Machines
IEEE Transactions on Computers
A processor desription language supporting retargetable multi-pipeline DSP program development tools
Proceedings of the 11th international symposium on System synthesis
PSCP: a scalable parallel ASIP architecture for reactive systems
Proceedings of the conference on Design, automation and test in Europe
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