Communicating sequential processes
Communicating sequential processes
Statecharts: A visual formalism for complex systems
Science of Computer Programming
Algorithms in C++
Computer organization & design: the hardware/software interface
Computer organization & design: the hardware/software interface
Instruction set extraction from programmable structures
EURO-DAC '94 Proceedings of the conference on European design automation
A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning
EURO-DAC '94 Proceedings of the conference on European design automation
IEEE Transactions on Software Engineering
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Mapping statechart models onto an FPGA-based ASIP architecture
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Instruction set definition and instruction selection for ASIPs
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Instruction-Set Modeling for ASIP Code Generation
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Synthesis of custom processors based on extensible platforms
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Dual-pipeline heterogeneous ASIP design
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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We describe a Codesign approach based on a parallel and scalable ASIP architecture, which is suitable for the implementation of reactive systems. The specification language of our approach is extended statecharts. Our ASIP architecture is scalable with respect to the number of processing elements as well as parameters such as bus widths and register file sizes. Instruction sets are generated from a library of components covering a spectrum of space/time trade-off alternatives. Our approach features a heuristic static timing analysis step for statecharts. An industrial example requiring the real-time control of several stepper motors illustrates the benefits of our approach.