Reduced instruction set computer architectures for VLSI
Reduced instruction set computer architectures for VLSI
Fundamentals of interactive computer graphics
Fundamentals of interactive computer graphics
Branch folding in the CRISP microprocessor: reducing branch delay to zero
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
An evaluation of branch architectures
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
The design and evaluation of a high performance Smalltalk system
The design and evaluation of a high performance Smalltalk system
High-performance computer architecture
High-performance computer architecture
Register windows vs. register allocation
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
The Clipper processor: instruction set architecture and implementation
Communications of the ACM
Register allocation by priority-based coloring
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
Digital System Implementation
Measurement and analysis of instruction use in the VAX-11/780
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Hardware/software tradeoffs for increased performance
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
A case study of VAX-11 instruction set usage for compiler execution
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
An instruction timing model of CPU performance
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Microprogramming heritage of RISC design
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
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Three new RISC (reduced instruction set computer) architectures, the Intel i860, the Motorola 88000, and the Sun Microsystems Sparc, are compared. The relative importance of an architectural comparison, as opposed to a comparison of implementations, is discussed, followed by a high-level overview of each of the architectures. The relative strengths and weaknesses of the three architectures in a number of key areas are analyzed, and their overall relative strengths and weaknesses are summarized.