Empirical evaluation of some features of instruction set processor architectures
Communications of the ACM
An instruction timing model of CPU performance
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Analysis and performance of computer instruction sets.
Analysis and performance of computer instruction sets.
Computer instruction set usage by programmers: an empirical investigation
Communications of the ACM
Branch folding in the CRISP microprocessor: reducing branch delay to zero
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
An evaluation of branch architectures
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Measurement and evaluation of the MIPS architecture and processor
ACM Transactions on Computer Systems (TOCS)
Measuring VAX 8800 performance with a histogram hardware monitor
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
The Clipper processor: instruction set architecture and implementation
Communications of the ACM
An analysis of 8086 instruction set usage in MS DOS programs
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
The design and development of a dynamic program behavior measurement tool for the Intel 8086/88
ACM SIGARCH Computer Architecture News
Techniques for efficient inline tracing on a shared-memory multiprocessor
SIGMETRICS '90 Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Address Tracing for Parallel Machines
Computer - Special issue on experimental research in computer architecture
An analysis of MIPS and SPARC instruction set utilization on the SPEC benchmarks
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
On the validity of trace-driven simulation for multiprocessors
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Modeling and measurement of the impact of Input/Output on system performance
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Fast instruction cache performance evaluation using compile-time analysis
SIGMETRICS '92/PERFORMANCE '92 Proceedings of the 1992 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Solutions Relating Static and Dynamic Machine Code Measurements
IEEE Transactions on Computers
EEL: machine-independent executable editing
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Performance of the VAX-11/780 translation buffer: simulation and measurement
ACM Transactions on Computer Systems (TOCS)
Trace-driven memory simulation: a survey
ACM Computing Surveys (CSUR)
A characterization of processor performance in the VAX-11/780
25 years of the international symposia on Computer architecture (selected papers)
LISP on a reduced-instruction-set-processor
LFP '86 Proceedings of the 1986 ACM conference on LISP and functional programming
Cache Performance in the VAX-11/780
ACM Transactions on Computer Systems (TOCS)
Computer
The AT&T WE32200 Design Challenge
IEEE Micro
A Comparison of RISC Architectures
IEEE Micro
Measurement and analysis of instruction use in the VAX-11/780
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Integrated program measurement and documentation tools
ICSE '84 Proceedings of the 7th international conference on Software engineering
A Characterization of Processor Performance in the vax-11/780
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Virtual machine showdown: Stack versus registers
ACM Transactions on Architecture and Code Optimization (TACO)
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Analysis of an instruction set as large and varied as the one specified for the VAX-11 architecture is important for aiding processor design evaluation. This paper looks at dynamic VAX-11 instruction set usage by one class of programs, and discusses the methodology and tools which have been developed to provide that information. Six VAX/VMS native mode compilers from Digital Equipment Corporation were used: BASIC, BLISS, COBOL, FORTRAN, PASCAL, and PL/I. A summary of results generated by analyzing executions of these six compilers is presented. Information is included for instruction and class frequency, general instruction features, operand specifiers, the memory data stream, register utilization, instruction sequencing, and branch displacements.