Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
ATUM: a new technique for capturing address traces using microcode
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Mache: no-loss trace compaction
SIGMETRICS '89 Proceedings of the 1989 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Abstract execution: a technique for efficiently tracing programs
Software—Practice & Experience
Techniques for efficient inline tracing on a shared-memory multiprocessor
SIGMETRICS '90 Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Address Tracing for Parallel Machines
Computer - Special issue on experimental research in computer architecture
Optimally profiling and tracing programs
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Generation and analysis of very long address traces
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
A case study of VAX-11 instruction set usage for compiler execution
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
Wisconsin Architectural Research Tool Set
ACM SIGARCH Computer Architecture News
Improving semi-static branch prediction by code replication
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Efficient detection of all pointer and array access errors
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Optimal tracing and incremental reexecution for debugging long-running programs
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Optimally profiling and tracing programs
ACM Transactions on Programming Languages and Systems (TOPLAS)
Techniques for compressing program address traces
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Analysis of the conditional skip instructions of the HP precision architecture
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Trap-driven simulation with Tapeworm II
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Active memory: a new abstraction for memory-system simulation
Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Examination of a memory access classification scheme for pointer-intensive and numeric programs
ICS '96 Proceedings of the 10th international conference on Supercomputing
Automatic incremental state saving
PADS '96 Proceedings of the tenth workshop on Parallel and distributed simulation
Address calculation for retargetable compilation and exploration of instruction-set architectures
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Trace cache: a low latency approach to high bandwidth instruction fetching
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
The performance potential of data dependence speculation & collapsing
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Instruction scheduling and executable editing
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Active memory: a new abstraction for memory system simulation
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Trace-driven memory simulation: a survey
ACM Computing Surveys (CSUR)
Optimizing the data cache performance of a software MPEG-2 video decoder
MULTIMEDIA '97 Proceedings of the fifth ACM international conference on Multimedia
Visualizing dynamic software system information through high-level models
Proceedings of the 13th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
Address trace compression through loop detection and reduction
SIGMETRICS '99 Proceedings of the 1999 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Function-level power estimation methodology for microprocessors
Proceedings of the 37th Annual Design Automation Conference
Efficient performance prediction for modern microprocessors
Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Source-to-Source Instrumentation for the Optimization of an Automatic Reading System
The Journal of Supercomputing
A time-stamping algorithm for efficient performance estimation of superscalar processors
Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Retargetable cache simulation using high level processor models
ACSAC '01 Proceedings of the 6th Australasian conference on Computer systems architecture
Retargetable Program Profiling Using High Level Processor Models
HiPC '01 Proceedings of the 8th International Conference on High Performance Computing
Representing Control Flow Behaviour of Programs
PACT '94 Proceedings of the IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques
Trace-Driven Memory Simulation: A Survey
Performance Evaluation: Origins and Directions
Protection of Software-Based Survivability Mechanisms
DSN '01 Proceedings of the 2001 International Conference on Dependable Systems and Networks (formerly: FTCS)
Cache Conscious Algorithms for Relational Query Processing
VLDB '94 Proceedings of the 20th International Conference on Very Large Data Bases
Efficient mapping of software system traces to architectural views
CASCON '00 Proceedings of the 2000 conference of the Centre for Advanced Studies on Collaborative research
Generating Dynamic Program Analysis Tools
ASWEC '97 Proceedings of the Australian Software Engineering Conference
Performance Analysis in CoDe-X Partitioning for Structural Programmable Accelerators
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Locality-Based Online Trace Compression
IEEE Transactions on Computers
Performance prediction of paging workloads using lightweight tracing
Future Generation Computer Systems - Systems performance analysis and evaluation
An efficient single-pass trace compression technique utilizing instruction streams
ACM Transactions on Modeling and Computer Simulation (TOMACS)
A performance methodology for commercial servers
IBM Journal of Research and Development
Identifying irreducible loops in the Instrumentation Point Graph
Journal of Systems Architecture: the EUROMICRO Journal
Bauhaus: a tool suite for program analysis and reverse engineering
Ada-Europe'06 Proceedings of the 11th Ada-Europe international conference on Reliable Software Technologies
Profiling Data-Dependence to Assist Parallelization: Framework, Scope, and Optimization
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Recovering memory access patterns of executable programs
Science of Computer Programming
Hi-index | 4.10 |
A program trace lists the addresses of instructions executed and data referenced during a program's execution. Earlier approaches to collecting program traces, including abstract execution and optimal control tracing, are reviewed. Two tracing systems based on these techniques are presented. Results collected when using the later systems on several programs show significant reductions in the cost of collecting traces. Reduction in trace file sizes are also significant.