ATUM: a new technique for capturing address traces using microcode
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Strategies for cache and local memory management by global program transformation
Journal of Parallel and Distributed Computing - Special Issue on Languages, Compilers and environments for Parallel Programming
Measuring Parallelism in Computation-Intensive Scientific/Engineering Applications
IEEE Transactions on Computers
A Case for Direct-Mapped Caches
Computer
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Abstract execution: a technique for efficiently tracing programs
Software—Practice & Experience
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
A simulation based study of TLB performance
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Wisconsin Architectural Research Tool Set
ACM SIGARCH Computer Architecture News
Optimally profiling and tracing programs
ACM Transactions on Programming Languages and Systems (TOPLAS)
EEL: machine-independent executable editing
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Performance of the VAX-11/780 translation buffer: simulation and measurement
ACM Transactions on Computer Systems (TOCS)
ACM Transactions on Computer Systems (TOCS)
ACM Computing Surveys (CSUR)
Computer
TAU: A Portable Parallel Program Analysis Environment for pC++
CONPAR 94 - VAPP VI Proceedings of the Third Joint International Conference on Vector and Parallel Processing: Parallel Processing
Automatic Accurate Time-Bound Analysis for High-Level Languages
LCTES '98 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Proceedings of the 7th SEI CSEE Conference on Software Engineering Education
Numeral Amount Recognition on Multi-Bank Checks
ICPR '96 Proceedings of the International Conference on Pattern Recognition (ICPR '96) Volume III-Volume 7276 - Volume 7276
Cache Performance of the SPEC Benchmark Suite
Cache Performance of the SPEC Benchmark Suite
Aspects of cache memory and instruction buffer performance
Aspects of cache memory and instruction buffer performance
nAIT: A source analysis and instrumentation framework for nesC
Journal of Systems and Software
| Hi-index | 0.00 |
Recording address traces that occur during a program execution is a significant technique for computer performance analysis. This paper describes a software method for address tracing via the instrumentation of C based languages. All program transformations are performed at the language level. This approach, which differs from the usual methods, allows portable and flexible program instrumentation. This tool has been developed to make easier the memory optimization of LIREChèques, an automatic bank check reading system. Two applications of the tool are clearly identified: (i) data cache use optimization, (ii) dynamic memory use optimization.