Identifying irreducible loops in the Instrumentation Point Graph

  • Authors:

  • Adam Betts;Guillem Bernat

  • Affiliations:

  • School of Innovation, Design and Technology, Mälardalen University, Box 883, 721 23 Västerås, Sweden;Rapita Systems Ltd., IT Centre, York YO10 5DG, England, UK

  • Venue:
  • Journal of Systems Architecture: the EUROMICRO Journal
  • Year:
  • 2011

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Abstract

The Instrumentation Point Graph (IPG) is a program model whose primary usage is within hybrid measurement-based frameworks that compute Worst-Case Execution Time (WCET) estimates. The IPG represents the transitions between instrumentation points (Ipoints) that are inserted into the program to collect measurements at run time. However, uncontrolled Ipoint placement often causes the resultant IPG to contain unstructured (i.e. irreducible) loops, potentially compromising the safety of WCET estimates unless the hierarchical containment among IPG loops can be correctly identified. The contributions of this paper are fourfold: (1) we show that the IPG is more susceptible to irreducibility even when the program itself is well structured; (2) we demonstrate that state-of-the-art loop detection algorithms, designed specifically to handle irreducible loops, generally fail to construct the correct hierarchical relationship between IPG loops; (3) we present an algorithm that identifies arbitrary irreducible loops in the IPG during its construction from another graph-based model, an extended type of Control Flow Graph (CFG) called the CFG^*; (4) we show how the structural relation between the IPG and the CFG^* allows loop bounds obtained through static analysis to be transferred onto the IPG.