Optimal local register allocation for a multiple-issue machine

Authors:
Waleed M. Meleis;Edward S. Davidson
Affiliations:
Advanced Computer Architecture Lab, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI;Advanced Computer Architecture Lab, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI
Venue:
ICS '94 Proceedings of the 8th international conference on Supercomputing
Year:
1994

Citing 6
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Abstract

This paper presents an algorithm that allocates registers optimally for straight-line code running on a generic multi-issue computer. On such a machine, an optimal register allocation is one that minimizes the number of issue slots that the code requires. Optimal spill selection and load/store placement are used to minimize the number of additional issue slots needed, given a schedule for the non-memory reference instructions and a fixed number of available physical registers. The generic multi-issue machine model closely models the operation of vector and VLIW processors, and could be extended to model super-scalar processors. The algorithm uses dynamic programming to search the state space of feasible register allocations; implicit and explicit state pruning are used to make the problem tractable without sacrificing optimality. The optimal allocation produced by the algorithm for a substantial example is presented.