Improving scratchpad allocation with demand-driven data tiling

  • Authors:

  • Xuejun Yang;Li Wang;Jingling Xue;Tao Tang;Xiaoguang Ren;Sen Ye

  • Affiliations:

  • National University of Defense Technology, Changsha, China;National University of Defense Technology, Changsha, China;University of New South Wales, Sydney, Australia;National University of Defense Technology, Changsha, China;National University of Defense Technology, Changsha, China;University of New South Wales, Sydney, Australia

  • Venue:
  • CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
  • Year:
  • 2010

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Abstract

Existing scratchpad memory (SPM) allocation algorithms for arrays, whether they rely on well-crafted heuristics or resort to integer linear programming (ILP) techniques, typically assume that every array is small enough to fit directly into the SPM. As a result, some arrays have to be spilled entirely to the off-chip memory in order to make room for other arrays to stay in the SPM, resulting in sometimes poor SPM utilization. In this paper, we introduce a new comparability graph coloring allocator that integrates for the first time data tiling and SPM allocation for arrays by tiling arrays on-demand to improve utilization of the SPM. The novelty lies in repeatedly identifying the heaviest path in an array interference graph and then reducing its weight by tiling certain arrays on the path appropriately with respect to the size of the SPM. The effectiveness of our allocator, which is presently restricted to tiling 1-D arrays, is validated by using a number of selected benchmarks for which existing allocators are ineffective.