Spill code minimization techniques for optimizing compliers
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
Coloring heuristics for register allocation
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
The priority-based coloring approach to register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
Register allocation via graph coloring
Register allocation via graph coloring
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Decoupling local variable accesses in a wide-issue superscalar processor
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Using node merging to enhance graph coloring
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Fusion-based register allocation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Preference-directed graph coloring
PLDI '02 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation
A Framework for Enhancing Code Quality in Limited Register Set Embedded Processors
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Register Saturation in Superscalar and VLIW Codes
CC '01 Proceedings of the 10th International Conference on Compiler Construction
A Framework for Efficient Register Allocation through Selective Register Demotion
LCR '00 Selected Papers from the 5th International Workshop on Languages, Compilers, and Run-Time Systems for Scalable Computers
A faster optimal register allocator
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Coloring heuristics for register allocation
ACM SIGPLAN Notices - Best of PLDI 1979-1999
Hardware-managed register allocation for embedded processors
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
A retargetable register allocation framework for embedded processors
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Optimistic register coalescing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Binary translation to improve energy efficiency through post-pass register re-allocation
Proceedings of the 4th ACM international conference on Embedded software
A Progressive Register Allocator for Irregular Architectures
Proceedings of the international symposium on Code generation and optimization
Register saturation in instruction level parallelism
International Journal of Parallel Programming
Tailoring Graph-coloring Register Allocation For Runtime Compilation
Proceedings of the International Symposium on Code Generation and Optimization
A global progressive register allocator
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Profile-based global live-range splitting
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Live-range unsplitting for faster optimal coalescing
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Register allocation deconstructed
Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems
Scratchpad memory allocation for data aggregates via interval coloring in superperfect graphs
ACM Transactions on Embedded Computing Systems (TECS)
Register loading via linear programming
WADS'11 Proceedings of the 12th international conference on Algorithms and data structures
LCPC'05 Proceedings of the 18th international conference on Languages and Compilers for Parallel Computing
Register allocation for programs in SSA-Form
CC'06 Proceedings of the 15th international conference on Compiler Construction
A decoupled non-SSA global register allocation using bipartite liveness graphs
ACM Transactions on Architecture and Code Optimization (TACO)
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Many optimizing compilers perform global register allocation using a Chaitin-style graph coloring algorithm. Live ranges that cannot be allocated to registers are spilled to memory. The amount of code required to spill the live range depends on the spilling heuristic used. Chaitin's spilling heuristic offers some guidance in reducing the amount of spill code produced. However, this heuristic does not allow the partial spilling of live ranges and the reduction in spill code is limited to a local level. In this paper, we present a global technique called interference region spilling that improves the spilling granularity of any local spilling heuristic. Our technique works above the local spilling heuristic, limiting the normal insertion of spill code to a portion of each spilled live range. By partially spilling live ranges, we can achieve large reductions in dynamically executed spill code; up to 75% in some cases and an average of 33.6% across the benchmarks tested.