Amortized efficiency of list update and paging rules
Communications of the ACM
Spill code minimization techniques for optimizing compliers
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
ACM Letters on Programming Languages and Systems (LOPLAS)
The allocation problem in hardware design
Discrete Applied Mathematics
Spill code minimization via interference region spilling
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All structured programs have small tree width and good register allocation
Information and Computation
Register allocation in structured programs
Journal of Algorithms - Special issue on SODA '95 papers
An approximation algorithm for the register allocation problem
Integration, the VLSI Journal
Approximation algorithms for directed Steiner problems
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SODA '02 Proceedings of the thirteenth annual ACM-SIAM symposium on Discrete algorithms
Improved results for directed multicut
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
Multiway Cuts in Directed and Node Weighted Graphs
ICALP '94 Proceedings of the 21st International Colloquium on Automata, Languages and Programming
A faster optimal register allocator
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
A new multilayered PCP and the hardness of hypergraph vertex cover
Proceedings of the thirty-fifth annual ACM symposium on Theory of computing
A generalized algorithm for graph-coloring register allocation
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
A Progressive Register Allocator for Irregular Architectures
Proceedings of the international symposium on Code generation and optimization
Approximating Directed Multicuts
Combinatorica
A global progressive register allocator
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Improved approximation for directed cut problems
Proceedings of the thirty-ninth annual ACM symposium on Theory of computing
Register allocation by puzzle solving
Proceedings of the 2008 ACM SIGPLAN conference on Programming language design and implementation
Register allocation deconstructed
Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems
WCET-aware register allocation based on graph coloring
Proceedings of the 46th Annual Design Automation Conference
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
MIRS: modulo scheduling with integrated register spilling
LCPC'01 Proceedings of the 14th international conference on Languages and compilers for parallel computing
LCPC'05 Proceedings of the 18th international conference on Languages and Compilers for Parallel Computing
ACM Transactions on Embedded Computing Systems (TECS)
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We study the following optimization problem. The input is a number k and a directed graph with a specified "start" vertex, each of whose vertices may have one "memory bank requirement", an integer. There are k "registers", labeled 1...k. A valid solution associates to the vertices with no bank requirement one or more "load instructions" L[b, j], for bank b and register j, such that every directed trail from the start vertex to some vertex with bank requirement c contains a vertex u that has been associated L[c, i] (for some register i ≤ k) and no vertex following u in the trail has been associated an L[b, i], for any bank b. The objective is to minimize the total number of associated load instructions. We give a k(k + 1)-approximation algorithm based on linear programming rounding, with (k+1) being the best possible unless Vertex Cover has approximation 2 - ε for ε 0. We also present a O(k log n) approximation, with n being the number of vertices in the input directed graph. Based on the same linear program, another rounding method outputs a valid solution with objective at most 2k times the optimum for k registers, using 2k registers.