An efficient K-way graph partitioning algorithm for task allocation in parallel computing systems
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PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
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Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
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OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
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IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
Taming the IXP network processor
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Register allocation & spilling via graph coloring
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Register Assignment for Software Pipelining with Partitioned Register Banks
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
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Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques
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ICCD '03 Proceedings of the 21st International Conference on Computer Design
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Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
O(√log n) approximation algorithms for min UnCut, min 2CNF deletion, and directed cut problems
Proceedings of the thirty-seventh annual ACM symposium on Theory of computing
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Context-Aware Gateway for Ubiquitous SIP-Based Services in Smart Homes
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DSN '07 Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks
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MASCOTS '07 Proceedings of the 2007 15th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
Novel directory service and message delivery mechanism enabling scalable mobile agent communication
Mobile Information Systems
Advances in mobile communications and computing
Mobile Information Systems - Advances in Mobile Communications and Computing
Ubiquitous supervisory system based on social contexts using ontology
Mobile Information Systems - Advances in Mobile Communications and Computing
Virtual social networks online and mobile systems
Mobile Information Systems
Mobile Information Systems
Optimal edge deletions for signed graph balancing
WEA'07 Proceedings of the 6th international conference on Experimental algorithms
Compiler assisted dynamic management of registers for network processors
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Improved fixed-parameter algorithms for two feedback set problems
WADS'05 Proceedings of the 9th international conference on Algorithms and Data Structures
A register allocation framework for banked register files with access constraints
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
C compiler design for a network processor
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Parameterized Complexity
Flexible multi-authority attribute-based signature schemes for expressive policy
Mobile Information Systems - Advances in Network-Based Information Systems
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Mobile and wireless networks are the integrant infrastructure of mobile and pervasive computing that aims at providing transparent and preferred information and services for people anytime anywhere. In such environments, end-to-end network bandwidth is crucial to improve user's transparent experience when providing on-demand services such as mobile video playing. As a result, powerful computing power is required for networked nodes, especially for routers. General-purpose processors cannot meet such requirements due to their limited processing ability, and poor programmability and scalability. Intel's network processor IXP is specially designed for fast packet processing to achieve a broad bandwidth. IXP provides a large number of registers to reduce the number of memory accesses. Registers in an IXP are physically partitioned as two banks so that two source operands in an instruction have to come from the two banks respectively, which makes the IXP register allocation tricky and different from conventional ones. In this paper, we investigate an approach for efficiently generating balanced bipartite graph and register allocation algorithms for the dual-bank register allocation in IXPs. The paper presents a graph uniform 2-way partition algorithm (FPT), which provides an optimal solution to the graph partition, and a heuristic algorithm for generating balanced bipartite graph. Finally, we design a framework for IXP register allocation. Experimental results demonstrate the framework and the algorithms are efficient in register allocation for IXP network processors.