Fundamental architectural considerations for network processors
Computer Networks: The International Journal of Computer and Telecommunications Networking - Network processors
IBM PowerNP network processor: Hardware, software, and applications
IBM Journal of Research and Development
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Mobile Information Systems - Mobile and Wireless Networks
Bitstream processing for embedded systems using C++ metaprogramming
Proceedings of the Conference on Design, Automation and Test in Europe
A paradigm for processing network protocols in parallel
ICA3PP'10 Proceedings of the 10th international conference on Algorithms and Architectures for Parallel Processing - Volume Part II
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One important problem in code generation for embedded processors is the design of efficient compilers for target machines with application-specific architectures. This paper outlines the design of a C compiler for an industrial application-specific instruction-set processor (ASIP) for telecom applications. The target ASIP is a, network processor with special instructions for bit-level access to data registers, which is required for packet-oriented communication protocol processing. From a practical viewpoint, we describe the main challenges in exploiting these application-specific features in a C compiler and we show how a compiler backend has been designed that accommodates these features by means of compiler intrinsics and a dedicated register allocator. The compiler is fully operational and first experimental results indicate that C-level programming of the ASIP leads to good code quality without the need for time-consuming assembly programming