Lazy data routing and greedy scheduling for application-specific signal processors
MICRO 21 Proceedings of the 21st annual workshop on Microprogramming and microarchitecture
Engineering a simple, efficient code-generator generator
ACM Letters on Programming Languages and Systems (LOPLAS)
Instruction selection using binate covering for code size optimization
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Using register-transfer paths in code generation for heterogeneous memory-register architectures
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Data routing: a paradigm for efficient data-path synthesis and code generation
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
An efficient model for DSP code generation: performance, code size, estimated energy
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Retargetable Code Generation for Digital Signal Processors
Retargetable Code Generation for Digital Signal Processors
Code Generation for Embedded Processors
Code Generation for Embedded Processors
Global Code Selection of Directed Acyclic Graphs
CC '94 Proceedings of the 5th International Conference on Compiler Construction
Code selection for media processors with SIMD instructions
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Constraint analysis for code generation: basic techniques and applications in FACTS
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Register allocation for common subexpressions in DSP data paths
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
C Compiler Design for an Industrial Network Processor
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Phase coupled operation assignment for VLIW processors with distributed register files
Proceedings of the 14th international symposium on Systems synthesis
Energy aware compilation for DSPs with SIMD instructions
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers
Transactions on High-Performance Embedded Architectures and Compilers II
Automatic vectorization using dynamic compilation and tree pattern matching technique in Jikes RVM
Proceedings of the 4th workshop on the Implementation, Compilation, Optimization of Object-Oriented Languages and Programming Systems
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