Logic synthesis for large pass transistor circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Wave steering in YADDs: a novel non-iterative synthesis and layout technique
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Fast Controllers for Data Dominated Applications
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Algebraic structure theory of sequential machines (Prentice-Hall international series in applied mathematics)
Telescopic units: a new paradigm for performance optimization of VLSI designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Interconnect pipelining in a throughput-intensive FPGA architecture
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Latency and latch count minimization in wave steered circuits
Proceedings of the 38th annual Design Automation Conference
PITIA: an FPGA for throughput-intensive applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
| Hi-index | 0.00 |
In this paper we address the problem of pipelining FSMs by extending wave-steering scheme from combinational to sequential realm. A unified approach employs direct mapping of State Transition Graph into a circuit realization. Experimental result on MCNC benchmarks show performance improvement of 2 to 4 times at the cost of an average area increase of 2.9 times.