Performance optimization of sequential circuits by eliminating retiming bottlenecks

  • Authors:
  • Sujit Dey;Miodrag Potkonjak;Steven G. Rothweiler

  • Affiliations:
  • C&C Research Labs, NEC, Princeton, NJ;C&C Research Labs, NEC, Princeton, NJ;C&C Research Labs, NEC, Princeton, NJ

  • Venue:
  • ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 1992

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Abstract