On the temporal equivalence of sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Efficient implementation of retiming
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Optimal clock period FPGA technology mapping for sequential circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
The case for retiming with explicit reset circuitry
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
An improved algorithm for minimum-area retiming
DAC '97 Proceedings of the 34th annual Design Automation Conference
Minimum area retiming with equivalent initial states
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Performance optimization of sequential circuits by eliminating retiming bottlenecks
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Efficient retiming of large circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Retiming revisited and reversed
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Performance-constrained pipelining of software loops onto reconfigurable hardware
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Placement driven retiming with a coupled edge timing model
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Register Transformations with Multiple Clock Domains
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Incremental retiming for FPGA physical synthesis
Proceedings of the 42nd annual Design Automation Conference
Compositional verification of retiming and sequential optimizations
Proceedings of the 45th annual Design Automation Conference
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