Automatic determination of optimal clocking parameters in synchronous MOS VLSI circuits
Proceedings of the fifth MIT conference on Advanced research in VLSI
Analysis and design of latch-controlled synchronous digital circuits
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Verification of interacting sequential circuits
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Retiming of Circuits with Single Phase Transparent Latches
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Clocking Optimization and Distribution in Digital Systemswith Scheduled Skews
Journal of VLSI Signal Processing Systems - Special issue on high performance clock distribution networks
Retiming sequential circuits with multiple register classes
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A practical approach to multiple-class retiming
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Inductive equivalence checking under retiming and resynthesis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Compositional verification of retiming and sequential optimizations
Proceedings of the 45th annual Design Automation Conference
Integration, the VLSI Journal
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