Reducing Null Messages in Misra's Distributed Discrete Event Simulation Method
IEEE Transactions on Software Engineering
The Wisconsin Wind Tunnel: virtual prototyping of parallel computers
SIGMETRICS '93 Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems
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ACM Transactions on Modeling and Computer Simulation (TOMACS)
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IEEE Transactions on Computers
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Proceedings of the 27th annual international symposium on Computer architecture
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IEEE Transactions on Computers
Parallel and Distribution Simulation Systems
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IEEE Micro
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IEEE Transactions on Computers
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ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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SlackSim: a platform for parallel simulations of CMPs on CMPs
ACM SIGARCH Computer Architecture News
SlackSim: a platform for parallel simulations of CMPs on CMPs
ACM SIGMETRICS Performance Evaluation Review
Parallel simulation of chip-multiprocessor by using multi-threading
AsiaMS '07 Proceedings of the IASTED Asian Conference on Modelling and Simulation
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Adaptive and Speculative Slack Simulations of CMPs on CMPs
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ACM Transactions on Design Automation of Electronic Systems (TODAES)
CRAW/P: a workload partition method for the efficient parallel simulation of manycores
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ACM Computing Surveys (CSUR)
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Proceedings of the 2013 ACM SIGSIM conference on Principles of advanced discrete simulation
Microprocessors & Microsystems
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Chip-multiprocessor (CMP) architectures present a challenge for efficient simulation, combining the requirements of a detailed microprocessor simulator with that of a tightly-coupled parallel system. In this paper, a distributed simulator for target CMPs is presented based on the Message Passing Interface (MPI) designed to run on a host cluster of workstations. Microbenchmark-based evaluation is used to narrow the parallelization design space concerning the performance impact of distributed vs. centralized target L2 simulation, blocking vs. non-blocking remote cache accesses, null-message vs. barrier techniques for clock synchronization, and network interconnect selection. The best combination is shown to yield speedups of up to 16 on a 9-node cluster of dual-CPU workstations, partially due to cache effects.