Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
The SPLASH-2 programs: characterization and methodological considerations
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Multiprocessor enhancements of the SimpleScalar tool set
ACM SIGARCH Computer Architecture News
Parallel simulation of chip-multiprocessor architectures
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Adaptive and Speculative Slack Simulations of CMPs on CMPs
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
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Parallel simulation is a technique to accelerate microarchitecture simulation of target CMPs by exploiting the inherent parallelism of host CMPs. In this paper, we explore the simulation paradigm of simulating each core of a target CMP in one thread and the spreading the threads across the hardware thread contexts of a host CMP. We introduce the concept of slack simulation where the Pthreads simulating different target cores do not synchronize after each simulated cycle, but rather they are given some slack. The slack is the difference in cycles between the simulated times of any two target cores. Small slacks,such as a few cycles, greatly improve the efficiency of parallel CMP simulations, with no or negligible simulation error. We have developed a simulation framework called SlackSim to experiment with various slack simulation schemes. Unlike previous attempts to parallelize multiprocessor simulations on distributed memory machines, SlackSim takes advantage of the efficient sharing of data in the host CMP architecture. We demonstrate the efficiency and accuracy of some well-known slack simulation schemes and of some new ones on SlackSim running on a state-of-the-art CMP platform.