Faster architectural simulation through parallelism
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
Modeling cost/performance of a parallel computer simulator
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Automatic parallelization of discrete event simulation programs
WSC '93 Proceedings of the 25th conference on Winter simulation
Parallel logic simulation on general purpose machines
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A Fast and High Quality Multilevel Scheme for Partitioning Irregular Graphs
SIAM Journal on Scientific Computing
Parallel simulation of chip-multiprocessor architectures
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Proceedings of the conference on Design, automation and test in Europe
A New Optimized Implemention of the SystemC Engine Using Acyclic Scheduling
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Low-Latency Virtual-Channel Routers for On-Chip Networks
Proceedings of the 31st annual international symposium on Computer architecture
An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation
IEEE Computer Architecture Letters
Speeding up SystemC simulation through process splitting
Proceedings of the conference on Design, automation and test in Europe
IEEE Computer Architecture Letters
ICCSA '08 Proceedings of the 2008 International Conference on Computational Sciences and Its Applications
Relaxing Synchronization in a Parallel SystemC Kernel
ISPA '08 Proceedings of the 2008 IEEE International Symposium on Parallel and Distributed Processing with Applications
Parallelizing SystemC Kernel for Fast Hardware Simulation on SMP Machines
PADS '09 Proceedings of the 2009 ACM/IEEE/SCS 23rd Workshop on Principles of Advanced and Distributed Simulation
A case study for NoC-based homogeneous MPSoC architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SCGPSim: a fast SystemC simulator on GPUs
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hi-index | 0.00 |
UNISIM has been shown to ease the development of simulators for multi-/many-core systems. However, UNISIM cycle-level simulations of large-scale multiprocessor systems could be very time consuming. In this article, we propose a systematic framework for accelerating UNISIM cycle-level simulations on multicore platforms. The proposed framework relies on exploiting the fine-grained parallelism within the simulated cycles using POSIX threads. A multithreaded simulation engine has been devised from the single-threaded UNISIM SystemC engine to facilitate the exploitation of inherent parallelism. An adaptive technique that manages the overall computation workload by adjusting the number of threads employed at any given time is proposed. In addition, we have introduced a technique to balance the workloads of multithreaded executions. This load balancing involves the distributions of SystemC objects among threads. A graph-partitioning-based technique has been introduced to automate such distributions. Finally, two strategies are proposed for realizing nonautomated and fully automated adaptive multithreaded simulations, respectively. Our investigations show that notable acceleration can be achieved by deploying the proposed framework. In particular, we show that simulations on an 8-core multicore platform can provide for close to 6X speedups when simulating many-core systems with large number of cores.