Proceedings of the conference on Design, automation and test in Europe
Parallel multilevel k-way partitioning scheme for irregular graphs
Supercomputing '96 Proceedings of the 1996 ACM/IEEE conference on Supercomputing
Design and Implementation of a Parallel Verilog Simulator: PVSim
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
A New Optimized Implemention of the SystemC Engine Using Acyclic Scheduling
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Theory of Computing Systems
Parallel Programming in C with MPI and OpenMP
Parallel Programming in C with MPI and OpenMP
Scheduling multithreaded computations by work stealing
SFCS '94 Proceedings of the 35th Annual Symposium on Foundations of Computer Science
A conservative approach to systemc parallelization
ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part IV
Online SystemC emulation acceleration
Proceedings of the 47th Design Automation Conference
Multi-core parallel simulation of system-level description languages
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Accelerating UNISIM-Based Cycle-Level Microarchitectural Simulations on Multicore Platforms
ACM Transactions on Design Automation of Electronic Systems (TODAES)
PADS '10 Proceedings of the 2010 IEEE Workshop on Principles of Advanced and Distributed Simulation
HLA-based simulation environment for distributed SystemC simulation
Proceedings of the 4th International ICST Conference on Simulation Tools and Techniques
SAGA: SystemC acceleration on GPU architectures
Proceedings of the 49th Annual Design Automation Conference
A Framework for exploration of parallel SystemC simulation on the single-chip cloud computer
Proceedings of the 5th International ICST Conference on Simulation Tools and Techniques
SystemC simulation on GP-GPUs: CUDA vs. OpenCL
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Optimized out-of-order parallel discrete event simulation using predictions
Proceedings of the Conference on Design, Automation and Test in Europe
Parallel programming with SystemC for loosely timed models: a non-intrusive approach
Proceedings of the Conference on Design, Automation and Test in Europe
On the use of GP-GPUs for accelerating compute-intensive EDA applications
Proceedings of the Conference on Design, Automation and Test in Europe
Out-of-order parallel simulation for ESL design
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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SystemC is a system-level modeling language and simulation framework which facilitates design and verification of processor designs at different levels. Recently, SystemC is becoming a popular choice for designers of both System-On-Chip (SoC) and embedded processors, due to its adaptability at cycle as well as transaction levels, and ability to model concurrent processes. However, the single threaded simulation kernel inherent to SystemC, prevents it from utilizing the potential computing power of symmetric multiprocessing (SMP) machines to speed up hardware simulation. We present a parallel SystemC simulation kernel, which is implemented using parallel programming techniques and leverages the parallel execution capabilities of multi-core machines to speed up hardware simulation. We discuss the mechanism we use for mapping parallel SystemC modules into different cores. Finally we report the performance of the parallelized SystemC kernel using a linear pipelined performance model and a pipelined performance model tailored to exhibit the behavior of real world simulation. Our results demonstrate that the performanceimprovement obtained by using parallelized SystemC for simulation of the above models is significant and improves with increasing design complexity of the simulated design and the number of cores in the machine running the simulators.