Distributed discrete-event simulation
ACM Computing Surveys (CSUR)
Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
Proceedings of the conference on Design, automation and test in Europe
Theory of Modeling and Simulation
Theory of Modeling and Simulation
Proceedings of the conference on Design, automation and test in Europe
RSP '04 Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping
Parallelizing SystemC Kernel for Fast Hardware Simulation on SMP Machines
PADS '09 Proceedings of the 2009 ACM/IEEE/SCS 23rd Workshop on Principles of Advanced and Distributed Simulation
Full simulation coverage for SystemC transaction-level models of systems-on-a-chip
Formal Methods in System Design
Online SystemC emulation acceleration
Proceedings of the 47th Design Automation Conference
Modeling constructs and kernel for parallel simulation of accuracy adaptive TLMs
Proceedings of the Conference on Design, Automation and Test in Europe
Multi-core parallel simulation of system-level description languages
Proceedings of the 16th Asia and South Pacific Design Automation Conference
HLA-based simulation environment for distributed SystemC simulation
Proceedings of the 4th International ICST Conference on Simulation Tools and Techniques
A Framework for exploration of parallel SystemC simulation on the single-chip cloud computer
Proceedings of the 5th International ICST Conference on Simulation Tools and Techniques
Parallel programming with SystemC for loosely timed models: a non-intrusive approach
Proceedings of the Conference on Design, Automation and Test in Europe
An automated parallel simulation flow for heterogeneous embedded systems
Proceedings of the Conference on Design, Automation and Test in Europe
Out-of-order parallel simulation for ESL design
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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SystemC has become a very popular language for the modeling of System-On-Chip (SoC) devices. However, due to the ever increasing complexity of SoC designs, the ever longer simulation times affect SoC exploration potential and time-to-market. We investigate the use of parallel computing to exploit the inherent concurrent execution of the hardware components, and thus to speed up the simulation of complex SoC’s. A parallel SystemC prototype based on the open source OSCI kernel is introduced and preliminary results are discussed.