Online SystemC emulation acceleration

  • Authors:
  • Scott Sirowy;Chen Huang;Frank Vahid

  • Affiliations:
  • University of California, Riverside;University of California, Riverside;University of California, Riverside and University of California, Irvine

  • Venue:
  • Proceedings of the 47th Design Automation Conference
  • Year:
  • 2010

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Abstract

Field-programmable gate arrays (FPGAs) have recently been used as platforms to emulate SystemC descriptions. Emulation supports in-system testing using real input and output. We previously showed emulation speed to be competitive with SystemC simulations on a PC when the emulator uses acceleration engines. A limit on the number of acceleration engines that can fit on an emulation platform creates new online problems involving runtime decisions as to when to load a SystemC process into an acceleration engine. We define the online SystemC emulation acceleration problem. In contrast to previous works that focus on statically improving SystemC (and the more general event-driven) simulations, we utilize online heuristics to manage the use of a limited number of SystemC acceleration engines in an emulation framework, where the kernel must adapt and react to dynamically changing process and event queues. We test several online heuristics and show 9x improvement over microprocessor-only emulation and 5x over statically preloaded acceleration engines. We further improve emulation performance by 10--20% by adding kernel bypass connections between acceleration engines and by adapting the online heuristics to make use of those connections.