LECSIM: a levelized event driven compiled logic simulation

  • Authors:
  • Zhicheng Wang;Peter M. Maurer

  • Affiliations:
  • Department of Computer Science and Engineering, University of South Florida, Tampa, FL;Department of Computer Science and Engineering, University of South Florida, Tampa, FL

  • Venue:
  • DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
  • Year:
  • 1991

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Abstract

LECSIM is a highly efficient logic simulator which integrates the advantages of event driven interpretive simulation and levelized compiled simulation. Two techniques contribute to the high efficiency. First it employs the zero-delay simulation model with levelized event scheduling to eliminate most unnecessary evaluations. Second, it compiles the central event scheduler into simple local scheduling segments which reduces the overhead of event scheduling. Experimental results show that LECSIM runs about 8-77 time faster than traditional unit-delay event-driven interpretive simulator. LECSIM also provides the option of scheduling with respect to individual gates or with respect to fan-out free blocks. When the circuit is partitioned into fan-out free blocks, the speed increases by a factor of 2-3. With partitioning, the speed of LECSIM is only about 1.5-3.4 times slower than a levelized compiled simulation for the combinational circuits we have tested.