Use of embedded scheduling to compile VHDL for effective parallel simulation

Authors:
John Willis;Zhiyuan Li;Tsang-Puu Lin
Affiliations:
System Technology & Architecture Div., IBM Corporation, Rochester, MN,;Dept. of CS, University of Minnesota, 200 Union Street SE, #4-192, Minneapolis, MN;Dept. of CS, University of Minnesota, 200 Union Street, #4-192, Minneapolis, MN
Venue:
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Year:
1995

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