LECSIM: a levelized event driven compiled logic simulation
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
The Inversion Algorithm for digital simulation
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Event manipulation for discrete simulations requiring large numbers of events
Communications of the ACM
Event driven simulation without loops or conditionals
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
A model and implementation of a universal time delay simulator for large digital nets
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
A hierarchical compiled code event-driven logic simulator
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hi-index | 0.00 |
Here we show that the Event Driven Condition Free (EVCF) simulation technique for gate-level circuits can be extended to the multi-delay timing model. In the multi-delay timing model, gates have different integer delays. Events are produced out of order and must be sorted for processing. The EVCF technique has shown spectacular gains in performance for the zero-delay and unit-delay models. The gains here are somewhat less spectacular, but are substantial, showing that the EVCF technique is an effective method for improving the performance of multi delay simulation.