Comparing algorithm for dynamic speed-setting of a low-power CPU
MobiCom '95 Proceedings of the 1st annual international conference on Mobile computing and networking
Instruction fetching: coping with code bloat
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
A power metric for mobile systems
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Nonideal battery and main memory effects on CPU speed-setting for low power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Wireless Communications: Principles and Practice
Wireless Communications: Principles and Practice
Analysis of Cache Performance for Operating Systems and Multiprogramming
Analysis of Cache Performance for Operating Systems and Multiprogramming
Non-Ideal Battery Properties and Low Power Operation in Wearable Computing
ISWC '99 Proceedings of the 3rd IEEE International Symposium on Wearable Computers
Balancing batteries, power, and performance: system issues in cpu speed-setting for mobile computing
Balancing batteries, power, and performance: system issues in cpu speed-setting for mobile computing
Power and accuracy trade-offs in sound-based context recognition systems
Pervasive and Mobile Computing
Reducing display power in DVS-enabled handheld systems
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
System-level integrated power management for handheld systems
Microprocessors & Microsystems
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This paper introduces a systematic approach to power awareness in mobile, handheld computers. It describes experimental evaluations of several techniques for improving the energy efficiency of a system, ranging from the network level down to the physical level of the battery. At the network level, a new routing method based upon the power consumed by the network subsystem is shown to improve power consumption by 15% on average and to reduce latency by 75% over methods that consider only the transmitted power. At the boundary between the network and the processor levels, the paper presents the problem of local versus remote processing and derives a figure of merit for determining whether a computation should be completed locally or remotely, one that involves the relative performance of the local and remote system, the transmission bandwidth and power consumption, and the network congestion. At the processor level, the main memory bandwidth is shown to have a significant effect on the relationship between performance and CPU frequency, which in turn determines the energy savings of dynamic CPU speed-setting. The results show that accounting for the main memory bandwidth using Amdahl's law permits the performance speed-up and peak power versus the CPU frequency to be estimated to within 5%. The paper concludes with a technique for mitigating the loss of battery energy capacity with large peak currents, showing an improvement of up to 10% in battery life, albeit at some cost to the size and weight of the system.