System lifetime extension by battery management: an experimental work
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Energy Efficient Scheduling for Datapath Synthesis
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
A case study of a system-level approach to power-aware computing
ACM Transactions on Embedded Computing Systems (TECS)
Discharge Current Steering for Battery Lifetime Optimization
IEEE Transactions on Computers
Memory-aware energy-optimal frequency assignment for dynamic supply voltage scaling
Proceedings of the 2004 international symposium on Low power electronics and design
Energy-efficient datapath scheduling using multiple voltages and dynamic clocking
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Power reduction techniques for microprocessor systems
ACM Computing Surveys (CSUR)
Energy-efficient, utility accrual scheduling under resource constraints for mobile embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Reducing display power in DVS-enabled handheld systems
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Accurate on-line prediction of processor and memoryenergy usage under voltage scaling
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
On scheduling soft real-time tasks with lock-free synchronization for embedded devices
Proceedings of the 2009 ACM symposium on Applied Computing
System-level integrated power management for handheld systems
Microprocessors & Microsystems
Battery recovery aware sensor networks
WiOPT'09 Proceedings of the 7th international conference on Modeling and Optimization in Mobile, Ad Hoc, and Wireless Networks
Energy-aware packet and task co-scheduling for embedded systems
EMSOFT '10 Proceedings of the tenth ACM international conference on Embedded software
The synergy between power-aware memory systems and processor voltage scaling
PACS'03 Proceedings of the Third international conference on Power - Aware Computer Systems
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This paper explores the system-level power-performance tradeoffs of dynamically varying CPU speed. Previous work in CPU speed-setting considered only the power of the CPU and only CPUs that vary supply voltage with frequency. This work takes a broader approach, considering total system power, battery capacity, and main memory bandwidth. The results, which are up to a factor of four less than ideal, show that all three must be considered when setting the CPU speed.