Approaches to multi-level sequential logic synthesis
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A fully implicit algorithm for exact state minimization
DAC '94 Proceedings of the 31st annual Design Automation Conference
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
System-on-Chip Oriented Fault-Tolerant Sequential Systems Implementation Methodology
DFT '01 Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Building Diverse Computer Systems
HOTOS '97 Proceedings of the 6th Workshop on Hot Topics in Operating Systems (HotOS-VI)
Security in embedded systems: Design challenges
ACM Transactions on Embedded Computing Systems (TECS)
An architecture a day keeps the hacker away
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
Periodic licensing of FPGA based intellectual property
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
N-variant systems: a secretless framework for security through diversity
USENIX-SS'06 Proceedings of the 15th conference on USENIX Security Symposium - Volume 15
CAD-based security, cryptography, and digital rights management
Proceedings of the 44th annual Design Automation Conference
The N-Version Approach to Fault-Tolerant Software
IEEE Transactions on Software Engineering
Remote activation of ICs for piracy prevention and digital right management
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Active hardware metering for intellectual property protection and security
SS'07 Proceedings of 16th USENIX Security Symposium on USENIX Security Symposium
Proceedings of the 45th annual Design Automation Conference
Information hiding in finite state machine
IH'04 Proceedings of the 6th international conference on Information Hiding
Techniques for the creation of digital watermarks in sequential circuit designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Local watermarks: methodology and application to behavioral synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
N-version temperature-aware scheduling and binding
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Low-power resource binding by postsilicon customization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
SEC'13 Proceedings of the 22nd USENIX conference on Security
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We propose the first method for designing N-variant sequential circuits. The flexibility provided by the N-variants enables a number of important tasks, including IP protection, IP metering, security, design optimization, self-adaptation and fault-tolerance. The method is based on extending the finite state machine (FSM) of the design to include multiple variants of the same design specification. The state transitions are managed by added signals that may come from various triggers depending on the target application. We devise an algorithm for implementing the N-variant IC design. We discuss the necessary manipulations of the added signals that would facilitate the various tasks. The key advantage to integrating the heterogeneity in the functional specification of the design is that we can configure the variants during or post-manufacturing, but removal, extraction or deletion of the variants is not viable. Experimental results on benchmark circuits demonstrate that the method can be automatically and efficiently implemented. Because of its lightweight, N-variant design is particularly well-suited for securing embedded systems. As a proof-of-concept, we implement the N-variant method for content protection in portable media players, e.g., iPod. We discuss how the N-variant design methodology readily enables new digital rights management methods.