Security Engineering: A Guide to Building Dependable Distributed Systems
Security Engineering: A Guide to Building Dependable Distributed Systems
Silicon physical random functions
Proceedings of the 9th ACM conference on Computer and communications security
Identification and authentication of integrated circuits: Research Articles
Concurrency and Computation: Practice & Experience - Computer Security
Physically Unclonable Function-Based Security and Privacy in RFID Systems
PERCOM '07 Proceedings of the Fifth IEEE International Conference on Pervasive Computing and Communications
Proceedings of the 44th annual Design Automation Conference
Physical unclonable functions for device authentication and secret key generation
Proceedings of the 44th annual Design Automation Conference
CAD-based security, cryptography, and digital rights management
Proceedings of the 44th annual Design Automation Conference
Remote activation of ICs for piracy prevention and digital right management
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Active hardware metering for intellectual property protection and security
SS'07 Proceedings of 16th USENIX Security Symposium on USENIX Security Symposium
N-variant IC design: methodology and applications
Proceedings of the 45th annual Design Automation Conference
A case against currently used hash functions in RFID protocols
OTM'06 Proceedings of the 2006 international conference on On the Move to Meaningful Internet Systems: AWeSOMe, CAMS, COMINF, IS, KSinBIT, MIOS-CIAO, MONET - Volume Part I
Active control and digital rights management of integrated circuit IP cores
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Techniques for Design and Implementation of Secure Reconfigurable PUFs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Low-power sub-threshold design of secure physical unclonable functions
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Modeling attacks on physical unclonable functions
Proceedings of the 17th ACM conference on Computer and communications security
Oblivious transfer based on physical unclonable functions
TRUST'10 Proceedings of the 3rd international conference on Trust and trustworthy computing
The glitch PUF: a new delay-PUF architecture exploiting glitch shapes
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Policy gradients for cryptanalysis
ICANN'10 Proceedings of the 20th international conference on Artificial neural networks: Part III
A PUF design for secure FPGA-based embedded systems
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
FPGA time-bounded unclonable authentication
IH'10 Proceedings of the 12th international conference on Information hiding
Matched public PUF: ultra low energy security platform
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Side-channel analysis of PUFs and fuzzy extractors
TRUST'11 Proceedings of the 4th international conference on Trust and trustworthy computing
An attack on PUF-Based session key exchange and a hardware-based countermeasure: erasable PUFs
FC'11 Proceedings of the 15th international conference on Financial Cryptography and Data Security
EDA for secure and dependable cybercars: challenges and opportunities
Proceedings of the 49th Annual Design Automation Conference
Practical security analysis of PUF-based two-player protocols
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA
Proceedings of the 2nd International Workshop on Hardware and Architectural Support for Security and Privacy
A transmission gate physical unclonable function and on-chip voltage-to-digital conversion technique
Proceedings of the 50th Annual Design Automation Conference
An FPGA chip identification generator using configurable ring oscillators
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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To ensure security and robustness of the next generation of Physically Unclonable Functions (PUFs), we have developed a new methodology for PUF design. Our approach employs integration of three key principles: (i) inclusion of multiple delay lines for creation of each response bit; (ii) transformations and combination of the challenge bits; and (iii) combination of the outputs from multiple delay lines; to create modular, easy to parameterize, secure and reliable PUF structures. Statistical analysis of the new structure and its comparison with existing PUFs indicates a significantly lower predictability, and higher resilience against circuit faults, reverse engineering and other security attacks.