Communications of the ACM
Protecting bus-based hardware IP by secret sharing
Proceedings of the 45th annual Design Automation Conference
EPIC: ending piracy of integrated circuits
Proceedings of the conference on Design, automation and test in Europe
Active control and digital rights management of integrated circuit IP cores
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Guest Editors’ Introduction to Security in Reconfigurable Systems Design
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Techniques for Design and Implementation of Secure Reconfigurable PUFs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Trust-Based Design and Check of FPGA Circuits Using Two-Level Randomized ECC Structures
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
A Secure Content Delivery System Based on a Partially Reconfigurable FPGA
IEICE - Transactions on Information and Systems
Information hiding for trusted system design
Proceedings of the 46th Annual Design Automation Conference
Security Primitives for Reconfigurable Hardware-Based Systems
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
SeReCon: a secure reconfiguration controller for self-reconfigurable systems
International Journal of Critical Computer-Based Systems
Authenticated encryption for FPGA bitstreams
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Securing netlist-level FPGA design through exploiting process variation and degradation
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
CT-RSA'12 Proceedings of the 12th conference on Topics in Cryptology
Securely sealing Multi-FPGA systems
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
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Using FPGAs, a designer can separate the design process from the manufacturing flow. Therefore, the owner of a sensitive design need not expose the design to possible theft and tampering during its manufacture, dramatically simplifying the process of assuring trust in that design. Modern FPGAs include bitstream security features that turn the fielded design trust problem into an information security problem, with well-known cryptographic information security solutions. The generic nature of the FPGA base array allows the validation expense to be amortized over all designs targeted to that base array. Even the task of checking design tools is simplified by using non-destructive checks of the FPGA design.