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Information and Computation
Inference of finite automata using homing sequences
STOC '89 Proceedings of the twenty-first annual ACM symposium on Theory of computing
Crytographic limitations on learning Boolean formulae and finite automata
STOC '89 Proceedings of the twenty-first annual ACM symposium on Theory of computing
LOGEX—an automatic logic extractor form transistor to gate level for CMOS technology
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Robust FPGA intellectual property protection through multiple small watermarks
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Candidate subcircuits for functional module identification in logic circuits
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
IEEE Spectrum
Silicon physical random functions
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Unveiling the ISCAS-85 Benchmarks: A Case Study in Reverse Engineering
IEEE Design & Test
Intellectual Property Metering
IHW '01 Proceedings of the 4th International Workshop on Information Hiding
Identifying High-Level Components in Combinational Circuits
GLS '98 Proceedings of the Great Lakes Symposium on VLSI '98
Candidate subcircuit enumeration for module identification in digital circuits
Candidate subcircuit enumeration for module identification in digital circuits
Tamper resistance: a cautionary note
WOEC'96 Proceedings of the 2nd conference on Proceedings of the Second USENIX Workshop on Electronic Commerce - Volume 2
Proceedings of the 44th annual Design Automation Conference
Remote activation of ICs for piracy prevention and digital right management
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
C is for circuits: capturing FPGA circuits as sequential code for portability
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Active hardware metering for intellectual property protection and security
SS'07 Proceedings of 16th USENIX Security Symposium on USENIX Security Symposium
EPIC: ending piracy of integrated circuits
Proceedings of the conference on Design, automation and test in Europe
Forward-Secure Content Distribution to Reconfigurable Hardware
RECONFIG '08 Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs
Techniques for Design and Implementation of Secure Reconfigurable PUFs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
The State-of-the-Art in IC Reverse Engineering
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Preventing IC Piracy Using Reconfigurable Logic Barriers
IEEE Design & Test
Negative Bias Temperature Instability in CMOS Devices
Microelectronic Engineering
Using logic-based reduction for adversarial component recovery
Proceedings of the 2010 ACM Symposium on Applied Computing
A Java based component identification tool for measuring the strength of circuit protections
Proceedings of the Sixth Annual Workshop on Cyber Security and Information Intelligence Research
Modeling attacks on physical unclonable functions
Proceedings of the 17th ACM conference on Computer and communications security
Integrated circuit digital rights management techniques using physical level characterization
Proceedings of the 11th annual ACM workshop on Digital rights management
Robust passive hardware metering
Proceedings of the International Conference on Computer-Aided Design
A knowledge-based expert system for automatic visual VLSI reverse-engineering: VLSI layout version
IEEE Transactions on Systems, Man, and Cybernetics, Part A: Systems and Humans
Fingerprinting techniques for field-programmable gate array intellectual property protection
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Provably complete hardware trojan detection using test point insertion
Proceedings of the International Conference on Computer-Aided Design
High-sensitivity hardware trojan detection using multimodal characterization
Proceedings of the Conference on Design, Automation and Test in Europe
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The continuously widening gap between the Non-Recurring Engineering(NRE) and Recurring Engineering (RE) costs of producing Integrated Circuit (IC) products in the past few decades gives high incentives to unauthorized cloning and reverse-engineering of ICs. Existing IC Digital Rights Management (DRM) schemes often demands high overhead in area, power, and performance, or require non-volatile storage. Our goal is to develop a novel Intellectual Property (IP) protection technique that offers universal protection to both Application-Specific Integrated Circuits (ASIC) and Field-Programmable Gate-Arrays (FPGAs) from unauthorized manufacturing and reverse engineering. In this paper we show a proof-of-concept implementation of the basic elements of the technique, as well as a case study of applying the anti-cloning technique to a nontrivial FPGA design.