Robust passive hardware metering

  • Authors:
  • Sheng Wei;Ani Nahapetian;Miodrag Potkonjak

  • Affiliations:
  • University of California, Los Angeles (UCLA), Los Angeles, CA;California State University, Northridge (CSUN), Northridge, CA, and University of California, Los Angeles (UCLA), Los Angeles, CA;University of California, Los Angeles (UCLA), Los Angeles, CA

  • Venue:
  • Proceedings of the International Conference on Computer-Aided Design
  • Year:
  • 2011

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Abstract

Current hardware metering techniques, which use manifestational properties of gates for ID extraction, are weakened by the non-uniform effects of aging in conjunction with variations in temperature and supply voltage. As an integrated circuit (IC) ages, the manifestational properties of the gates change, and thus the ID used for hardware metering can not be valid over time. Additionally, the previous approaches require large amounts of costly measurements and often are difficult to scale to large designs. We resolve the deleterious effects of aging by going to the physical level and primarily targeting the characterization of threshold voltage. Although threshold voltage is modified with aging, we can recover its original value for use as the IC identifier. Another key aspect of our approach involves using IC segmentation for gate-level characterization. This results in a cost effective approach by limiting measurements, and has a significant effect on the approach scalability. Finally, by using threshold voltage for ID creation, we are able to quantify the probability of coincidence between legitimate and pirated ICs, thus for the first time quantitatively and accurately demonstrating the effectiveness of a hardware metering approach.