IPP@HDL: efficient intellectual property protection scheme for IP cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
Integrated circuit digital rights management techniques using physical level characterization
Proceedings of the 11th annual ACM workshop on Digital rights management
Robust passive hardware metering
Proceedings of the International Conference on Computer-Aided Design
Can EDA combat the rise of electronic counterfeiting?
Proceedings of the 49th Annual Design Automation Conference
RFID based access control protection scheme for SRAM FPGA IP cores
Microprocessors & Microsystems
Hardware security: threat models and metrics
Proceedings of the International Conference on Computer-Aided Design
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Fingerprinting is an approach that assigns a unique and invisible ID to each sold instance of the intellectual property (IP). One of the key advantages fingerprinting-based intellectual property protection (IPP) has over watermarking-based IPP is the enabling of tracing stolen hardware or software. Fingerprinting schemes have been widely and effectively used to achieve this goal; however, their application domain has been restricted only to static artifacts, such as image and audio, where distinct copies can be obtained easily. In this paper, we propose the first generic fingerprinting technique that can be applied to an arbitrary synthesis (optimization or decision) or compilation problem and, therefore to hardware and software IPs. The key problem with design IP fingerprinting is that there is a need to generate a large number of structurally unique but functionally and timing identical designs. To reduce the cost of generating such distinct copies, we apply iterative optimization in an incremental fashion to solve a fingerprinted instance. Therefore, we leverage on the optimization effort already spent in obtaining previous solutions, yet we generate a uniquely fingerprinted new solution. This generic approach is the basis for developing specific fingerprinting techniques for four important problems in VLSI CAD: partitioning, graph coloring, satisfiability, and standard-cell placement. We demonstrate the effectiveness of the new fingerprinting-based IPP techniques on a number of standard benchmarks.