ACISP '01 Proceedings of the 6th Australasian Conference on Information Security and Privacy
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
CRYPTO '96 Proceedings of the 16th Annual International Cryptology Conference on Advances in Cryptology
On Boolean and Arithmetic Masking against Differential Power Analysis
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Random Register Renaming to Foil DPA
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Electromagnetic Analysis: Concrete Results
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Instruction Stream Mutation for Non-Deterministic Processors
ASAP '02 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
Improving Smart Card Security Using Self-Timed Circuits
ASYNC '02 Proceedings of the 8th International Symposium on Asynchronus Circuits and Systems
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Power Analysis Resistant AES Implementation with Instruction Set Extensions
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Constructive and Destructive Use of Compilers in Elliptic Curve Cryptography
Journal of Cryptology
Transactions on Computational Science IV
A Unified Framework for the Analysis of Side-Channel Key Recovery Attacks
EUROCRYPT '09 Proceedings of the 28th Annual International Conference on Advances in Cryptology: the Theory and Applications of Cryptographic Techniques
A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
FSE'05 Proceedings of the 12th international conference on Fast Software Encryption
Template attacks in principal subspaces
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
The “backend duplication” method
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
A digital design flow for secure integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Compiler mitigations for time attacks on modern x86 processors
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
Robust passive hardware metering
Proceedings of the International Conference on Computer-Aided Design
A code morphing methodology to automate power analysis countermeasures
Proceedings of the 49th Annual Design Automation Conference
Compiler-based side channel vulnerability analysis and optimized countermeasures application
Proceedings of the 50th Annual Design Automation Conference
Sleuth: automated verification of software power analysis countermeasures
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
Hi-index | 0.00 |
In cryptography, side channel attacks, such as power analysis, attempt to uncover secret information from the physical implementation of cryptosystems rather than exploiting weaknesses in the cryptographic algorithms themselves. The design and implementation of physically secure cryptosystems is a challenge for both hardware and software designers. Measuring and evaluating the security of a system is manual and empirical, which is costly and time consuming; this work demonstrates that it is possible to automate these processes. We introduce a systematic methodology for automatic application of software countermeasures and demonstrate its effectiveness on an AES software implementation running on an 8-bit AVR microcontroller. The framework identifies the most vulnerable instructions of the implementation to power analysis attacks, and then transforms the software using a chosen countermeasure to protect the vulnerable instructions. Lastly, it evaluates the security of the system using an information-theoretic metric and a direct attack.