Advanced compiler design and implementation
Advanced compiler design and implementation
Towards Sound Approaches to Counteract Power-Analysis Attacks
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Side Channel Cryptanalysis of a Higher Order Masking Scheme
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Data Flow Analysis: Theory and Practice
Data Flow Analysis: Theory and Practice
Provably secure higher-order masking of AES
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
A first step towards automatic application of power analysis countermeasures
Proceedings of the 48th Design Automation Conference
Higher order masking of the AES
CT-RSA'06 Proceedings of the 2006 The Cryptographers' Track at the RSA conference on Topics in Cryptology
A code morphing methodology to automate power analysis countermeasures
Proceedings of the 49th Annual Design Automation Conference
Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Efficient and provably secure methods for switching from arithmetic to boolean masking
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Journal of Systems and Software
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Modern embedded systems manage sensitive data increasingly often through cryptographic primitives. In this context, side-channel attacks, such as power analysis, represent a concrete threat, regardless of the mathematical strength of a cipher. Evaluating the resistance against power analysis of cryptographic implementations and preventing it, are tasks usually ascribed to the expertise of the system designer. This paper introduces a new security-oriented data-flow analysis assessing the vulnerability level of a cipher with bit-level accuracy. A general and extensible compiler-based tool was implemented to assess the instruction resistance against power-based side-channels. The tool automatically instantiates the essential masking countermeasures, yielding a x2.5 performance speedup w.r.t. protecting the entire code.