SVD-Based Ghost Circuitry Detection

Authors:
Michael Nelson;Ani Nahapetian;Farinaz Koushanfar;Miodrag Potkonjak
Affiliations:
Computer Science Department, UCLA, Los Angeles, USA 90095;Computer Science Department, UCLA, Los Angeles, USA 90095;Computer Science Department, Electrical and Computer Engineering Department, Rice University, Houston 77005;Computer Science Department, UCLA, Los Angeles, USA 90095
Venue:
Information Hiding
Year:
2009

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Abstract

Ghost circuitry (GC) insertion is the malicious addition of hardware in the specification and/or implementation of an IC by an attacker intending to change circuit functionality. There are numerous GC insertion sources, including untrusted foundries, synthesis tools and libraries, testing and verification tools, and configuration scripts. Moreover, GC attacks can greatly compromise the security and privacy of hardware users, either directly or through interaction with pertinent systems, application software, or with data. GC detection is a particularly difficult task in modern and pending deep submicron technologies due to intrinsic manufacturing variability. Here, we provide algebraic and statistical approaches for the detection of ghost circuitry. A singular value decomposition (SVD)-based technique for gate characteristic recovery is applied to solve a system of equations created using fast and non-destructive measurements of leakage power and/or delay. This is then combined with statistical constraint manipulation techniques to detect embedded ghost circuitry. The effectiveness of the approach is demonstrated on the ISCAS 85 benchmarks.