A Scheme for On-Chip Timing Characterization
VTS '06 Proceedings of the 24th IEEE VLSI Test Symposium
Analysis and modeling of CD variation for statistical static timing
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
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VTS '07 Proceedings of the 25th IEEE VLSI Test Symmposium
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At-speed delay characterization for IC authentication and Trojan Horse detection
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
A region based approach for the identification of hardware Trojans
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
Hardware Trojan detection using path delay fingerprint
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
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Proceedings of the 46th Annual Design Automation Conference
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HST '09 Proceedings of the 2009 IEEE International Workshop on Hardware-Oriented Security and Trust
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Proceedings of the 2009 International Conference on Computer-Aided Design
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Proceedings of the 47th Design Automation Conference
Proceedings of the 47th Design Automation Conference
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IEEE Transactions on Information Forensics and Security
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IEEE Transactions on Information Forensics and Security - Part 2
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Proceedings of the sixth ACM conference on Security and privacy in wireless and mobile networks
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Proceedings of the 50th Annual Design Automation Conference
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Proceedings of the 2013 ACM SIGSAC conference on Computer & communications security
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This paper proposes a novel minimal test point insertion methodology that provisions a provably complete detection of hardware Trojans by noninvasive timing characterization. The objective of test point insertion is to break the reconvergent paths so that target routes for Trojan delay testing are specifically observed. We create a satisfiability-based input vector selection for sensitizing and characterizing each single timing path. Evaluations on benchmark circuits demonstrate that the test point-based Trojan detection can cover all circuit locations and can detect Trojans accurately with less than 5% performance overhead.