A Public-Key Watermarking Technique for IP Designs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Behavioral synthesis techniques for intellectual property protection
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Active hardware metering for intellectual property protection and security
SS'07 Proceedings of 16th USENIX Security Symposium on USENIX Security Symposium
A method for hardware metering
ICCOM'05 Proceedings of the 9th WSEAS International Conference on Communications
N-variant IC design: methodology and applications
Proceedings of the 45th annual Design Automation Conference
Active control and digital rights management of integrated circuit IP cores
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Synthesis-for-testability watermarking for field authenticatioil of VLSI intellectual property
IEEE Transactions on Circuits and Systems Part I: Regular Papers
An efficient locking and unlocking method of sequential systems
Proceedings of the 2012 ACM Research in Applied Computation Symposium
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We present a methodology for the watermarking of synchronous sequential circuits that makes it possible to identify the authorship of designs by imposing a digital watermark on the state transition graph (STG) of the circuit. The methodology is applicable to sequential designs that are made available as firm intellectual property, the designation commonly used to characterize designs specified as structural hardware description languages or circuit netlists. The watermarking is obtained by manipulating the STG of the design in such a way as to make it exhibit a chosen property that is extremely rare in nonwatermarked circuits while, at the same time, not changing the functionality of the circuit. This manipulation is performed without ever actually computing this graph in either implicit or explicit form. Instead, the digital watermark is obtained by direct manipulation of the circuit description. We present evidence that no known algorithms for circuit manipulation can be used to efficiently remove or change the watermark and that the process is immune to a variety of other attacks. We present both theoretical and experimental results that show that the watermarking can be created and verified efficiently. We also test possible attack strategies and verify that they are inapplicable to realistic designs of medium to large complexity