Improving resource-unaware SAT solvers

Authors:
Steffen Hölldobler;Norbert Manthey;Ari Saptawijaya
Affiliations:
International Center for Computational Logic, Technische Universität Dresden, Dresden, Germany;International Center for Computational Logic, Technische Universität Dresden, Dresden, Germany;International Center for Computational Logic, Technische Universität Dresden, Dresden, Germany
Venue:
LPAR'10 Proceedings of the 17th international conference on Logic for programming, artificial intelligence, and reasoning
Year:
2010

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Abstract

The paper discusses cache utilization in state-of-the-art SAT solvers. The aim of the study is to show how a resource-unaware SAT solver can be improved by utilizing the cache sensibly. The analysis is performed on a CDCL-based SAT solver using a subset of the industrial SAT Competition 2009 benchmark. For the analysis, the total cycles, the resource stall cycles, the L2 cache hits and the L2 cache misses are traced using sample based profiling. Based on the analysis, several techniques - some of which have not been used in SAT solvers so far - are proposed resulting in a combined speedup up to 83% without affecting the search path of the solver. The average speedup on the benchmark is 60%. The new techniques are also applied to MiniSAT2.0 improving its runtime by 20% on average.