Automatic test program generation for pipelined processors
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
High-level test generation for design verification of pipelined microprocessors
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Embedded hardware and software self-testing methodologies for processor cores
Proceedings of the 37th Annual Design Automation Conference
Formal Methods in System Design
Test Sets and Reject Rates: All Fault Coverages are Not Created Equal
IEEE Design & Test
Automatic verification of Pipelined Microprocessor Control
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
A Novel Functional Test Generation Method for Processors Using Commercial ATPG
Proceedings of the IEEE International Test Conference
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Testing embedded-core based system chips
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A scalable software-based self-test methodology for programmable processors
Proceedings of the 40th annual Design Automation Conference
Abstract State Machines: A Method for High-Level System Design and Analysis
Abstract State Machines: A Method for High-Level System Design and Analysis
Instruction Randomization Self Test For Processor Cores
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Computer Architecture: A Quantitative Approach
Computer Architecture: A Quantitative Approach
FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis
Proceedings of the conference on Design, automation and test in Europe
Graph-Based Functional Test Program Generation for Pipelined Processors
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Fully Automatic Test Program Generation for Microprocessor Cores
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Functional Tests for RISC-microprocessors
Automation and Remote Control
Test Generation for Microprocessors
IEEE Transactions on Computers
| Hi-index | 0.00 |
A new approach for developing functional diagnostic tests of processors with parallelism of the level of computer code is represented. The approach is based on functional decomposition of the processor architecture and use of functional models. The approach is applied to developing the technique for testing mechanisms of storage and transmission of conveyor process data. Models and algorithms for generation of tests of these mechanisms are developed. The performance of diagnostic tests is approved on the model.