FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis

Authors:
V. Vedula;J. Abraham
Affiliations:
Computer Engineering Research Center, The University of Texas at Austin, Austin, TX;Computer Engineering Research Center, The University of Texas at Austin, Austin, TX
Venue:
Proceedings of the conference on Design, automation and test in Europe
Year:
2002

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Abstract

Test sets for path delay faults in circuits with largenumbers of paths are typically generated for path delayfaults associated with the longest circuit paths. We showthat such test sets may not detect faults associated with thenext-to-longest paths. This may lead to undetected failuressince shorter paths may fail without any of the longestpaths failing. In addition, paths that appear to be shortermay actually be longer than the longest paths if the procedureused for estimating path length is inaccurate. Wepropose a test enrichment procedure that increasessignificantly the number of faults associated with thenext-to-longest paths that are detected by a (compact) testset. This is achieved by allowing the underlying test generationprocedure the flexibility of detecting or not detect-ingthe faults associated with the next-to-longest paths.Faults associated with next-to-longest paths are detectedwithout increasing the number of tests beyond thatrequired to detect the faults associated with the longestpaths. The proposed procedure thus improves the qualityof the test set without increasing its size.