A protocol test generation procedure
Computer Networks and ISDN Systems
Dynamic fault collapsing and diagnostic test pattern generation for sequential circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A VHDL error simulator for functional test generation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Functional test generation for behaviorally sequential models
Proceedings of the conference on Design, automation and test in Europe
A diagnostic test generation procedure for synchronous sequential circuits based on test elimination
ITC '98 Proceedings of the 1998 IEEE International Test Conference
GARDA: a diagnostic ATPG for large synchronous sequential circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
RTL-Based Functional Test Generation for High Defects Coverage in Digital SOCs
ETW '00 Proceedings of the IEEE European Test Workshop
Diagnostic Test Pattern Generation for Sequential Circuits
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis
Proceedings of the conference on Design, automation and test in Europe
Test generation for sequential circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On achieving complete fault coverage for sequential machines
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
We study the relationship between diagnostic test generation for a gate-level fault model, which is used for generating diagnostic test sets for manufacturing defects, and functional test generation for a high-level fault model. In general, a functional fault may partially represent some of the effects of one gate-level fault but not another. Generating a test sequence for the functional fault is then likely to detect one gate-level fault but not the other, thus distinguishing the two faults. This relationship points to the ability to use a functional test generation procedure (that targets functional fault detection) as a way of generating diagnostic test sequences for gate-level faults. We use this observation in two ways. The more direct way is to define functional faults that correspond to the differences between pairs of gate-level faults. The second way is to use functional test sequences as diagnostic test sequences without explicitly considering gate-level faults. We support the use of the resulting procedures with experimental results.