IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An observability-based code coverage metric for functional simulation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Functional vector generation for HDL models using linear programming and 3-satisfiability
DAC '98 Proceedings of the 35th annual Design Automation Conference
Symbolic functional vector generation for VHDL specifications
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Simulation vector generation from HDL descriptions for observability-enhanced statement coverage
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Formal verification meets simulation (embedded tutorial) (abstract only)
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Improving coverage analysis and test generation for large designs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Modeling design constraints and biasing in simulation using BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Art of Software Testing
Modeling and Simulation of Design Errors
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Implicit test generation for behavioral VHDL models
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Testability Analysis and ATPG on Behavioral RT-Level VHDL
Proceedings of the IEEE International Test Conference
High-Level Observability for Effective High-Level ATPG
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Symbolic optimization of interacting controllers based on redundancy identification and removal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Protected IP-core test generation
Proceedings of the 12th ACM Great Lakes symposium on VLSI
On automatic generation of RTL validation test benches using circuit testing techniques
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Fault Models and Test Generation for Hardware-Software Covalidation
IEEE Design & Test
A Probabilistic Method for the Computation of Testability of RTL Constructs
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Laerte++: an object oriented high-level TPG for systemC designs
Languages for system specification
Electronic Notes in Theoretical Computer Science (ENTCS)
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