Testability Analysis and ATPG on Behavioral RT-Level VHDL

RTL Test Justification and Propagation Analysis for Modular Designs

Journal of Electronic Testing: Theory and Applications - special issue on high-level test synthesis

Testability Enhancement for Control-Flow Intensive Behaviors

Journal of Electronic Testing: Theory and Applications

Exploiting Behavioral Information in Gate-Level ATPG

Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop

Automatic test bench generation for validation of RT-level descriptions: an industrial experience

DATE '00 Proceedings of the conference on Design, automation and test in Europe

Functional test generation for behaviorally sequential models

Proceedings of the conference on Design, automation and test in Europe

Fast sequential circuit test generation using high-level and gate-level techniques

Proceedings of the conference on Design, automation and test in Europe

Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications

IEEE Transactions on Computers - Special issue on fault-tolerant embedded systems

RTL Design Validation, DFT and Test Pattern Generation for High Defects Coverage

Journal of Electronic Testing: Theory and Applications

RT-Level ITC'99 Benchmarks and First ATPG Results

IEEE Design & Test

Automatic Validation of Protocol Interfaces Described in VHDL

Real-World Applications of Evolutionary Computing, EvoWorkshops 2000: EvoIASP, EvoSCONDI, EvoTel, EvoSTIM, EvoROB, and EvoFlight

Implicit test generation for behavioral VHDL models

ITC '98 Proceedings of the 1998 IEEE International Test Conference

DFT guidance through RTL test justification and propagation analysis

ITC '98 Proceedings of the 1998 IEEE International Test Conference

RT-level TPG Exploiting High-Level Synthesis Information

VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium

REGISTER-TRANSFER LEVEL FAULT MODELING AND TEST EVALUATION TECHNIQUES FOR VLSI CIRCUITS

ITC '00 Proceedings of the 2000 IEEE International Test Conference

AMLETO: A Multi-language Environment for Functional Test Generation

ITC '01 Proceedings of the 2001 IEEE International Test Conference

An Application of Genetic Algorithms and BDDs to Functional Testing

ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors

References

SystemC

Efficient Static Compaction of Test Sequence Sets through the Application of Set Covering Techniques

Proceedings of the conference on Design, automation and test in Europe - Volume 1

Designing Self Test Programs for Embedded DSP Cores

Proceedings of the conference on Design, automation and test in Europe - Volume 2

A New Testability Calculation Method to Guide RTL Test Generation

Journal of Electronic Testing: Theory and Applications

Logic-level mapping of high-level faults

Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI

A Self Test Program Design Technique for Embedded DSP Cores

Journal of Electronic Testing: Theory and Applications

A software-based methodology for the generation of peripheral test sets based on high-level descriptions

Proceedings of the 20th annual conference on Integrated circuits and systems design

Automatic constraint based test generation for behavioral HDL models

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Logic-level mapping of high-level faults

Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI

Coverage-directed observability-based validation for embedded software

ACM Transactions on Design Automation of Electronic Systems (TODAES)