Communications of the ACM
On the learnability of Boolean formulae
STOC '87 Proceedings of the nineteenth annual ACM symposium on Theory of computing
A deterministic algorithm for sparse multivariate polynomial interpolation
STOC '88 Proceedings of the twentieth annual ACM symposium on Theory of computing
Interpolating polynomials from their values
Journal of Symbolic Computation - Special issue on computational algebraic complexity
Finding the Optimal Variable Ordering for Binary Decision Diagrams
IEEE Transactions on Computers
Reduction of OBDDs in linear time
Information Processing Letters
An introduction to computational learning theory
An introduction to computational learning theory
Test program generation for functional verification of PowerPC processors in IBM
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Improving the Variable Ordering of OBDDs Is NP-Complete
IEEE Transactions on Computers
Fast Probabilistic Algorithms for Verification of Polynomial Identities
Journal of the ACM (JACM)
Improved Sparse Multivariate Polynomial Interpolation Algorithms
ISAAC '88 Proceedings of the International Symposium ISSAC'88 on Symbolic and Algebraic Computation
A Novel Functional Test Generation Method for Processors Using Commercial ATPG
Proceedings of the IEEE International Test Conference
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A scalable software-based self-test methodology for programmable processors
Proceedings of the 40th annual Design Automation Conference
On Testing the Path Delay Faults of a Microprocessor Using its Instruction Set
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
FRITS " A Microprocessor Functional BIST Method
ITC '02 Proceedings of the 2002 IEEE International Test Conference
FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis
Proceedings of the conference on Design, automation and test in Europe
On A Software-Based Self-Test Methodology and Its Application
VTS '05 Proceedings of the 23rd IEEE Symposium on VLSI Test
Software-based self-test methodology for crosstalk faults in processors
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Sibling-substitution-based BDD minimization using don't cares
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A System-layer Infrastructure for SoC Diagnosis
Journal of Electronic Testing: Theory and Applications
An incremental learning framework for estimating signal controllability in unit-level verification
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Extracting a simplified view of design functionality based on vector simulation
HVC'06 Proceedings of the 2nd international Haifa verification conference on Hardware and software, verification and testing
| Hi-index | 14.98 |
Deterministic functional test pattern generation has been a long-standing open problem, which is an important problem to be solved for both design verification and manufacturing testing. One key in developing a practical functional test pattern generation approach is to avoid the exponential growth of the test generation complexity in terms of the design size. This work proposes a novel functional test generation approach where simulation results are used to guide the generation of additional tests. Our methodology avoids the complexity growth issue by converting some modules in a design into simpler and more efficient models. Then, these models are used to facilitate the actual test generation process. We develop two sets of techniques to achieve these conversions: Boolean learning for random logic and arithmetic learning for datapath modules. We demonstrate the effectiveness and discuss the limitations of these techniques through experiments on benchmark circuits. Last, we validate the overall test generation methodology based on the OpenRISC 1200 microprocessor.